by Mat Dirjish
At IEDM 2025, CEA-Leti and STMicroelectronics presented key enablers for a new high-performance and versatile RF Si platform that integrates active and passive devices used in RF and Optical FEM. Their joint paper, titled “Unlocking High-Performance Si RF Platforms with SiGe HBT and RFSOI Switch Technologies,” details 3D sequential integration of silicon-germanium (SiGe) heterojunction bipolar transistors (HBT), RF SOI switches, and passives on a single wafer. Reportedly, this opens a path to highly integrated, low parasitic, and cost-efficient systems for next-generation wireless and wireline communications.
The paper describes the feasibility of building high-performance components directly on a single silicon wafer rather than packaging or stacking them on separate chips. This is achievable via 3D sequential integration, which layers different device types like SiGe HBT and SOI CMOS switches without overheating the lower tiers during processing.
In terms of cost efficiency, the partners showed that a localized trap-rich layer can achieve RF isolation and linearity comparable to costly commercial trap-rich substrates, while withstanding thermal cycles up to 600°C. As a result, this ensures the performance of the underlying SiGe HBT layer. Additionally, extending silicon’s reach of sequential integration into the RF domain forecasts a future of more accessible, energy-efficient connectivity. Fully integrated RF and optical front ends could simplify the manufacturing of dense wireless networks for smart cities, autonomous systems, and AI datacenters.
According to the partners, achieving a performant RF Partially Depleted (PD) SOI switch at 600°C instead of 1,000°C is a first. They claim that the process flow of this low-temperature device does not rely on new equipment or costly steps and is thereby industrially viable. For deeper details, visit the CEA-Leti and STMicroelectronics websites.
Mat Dirjish Online 