by Mat Dirjish
Researchers from miniaturization technologies entity CEA-Leti and Spintec, a joint research unit of CEA, have demonstrated a hybrid nanoelectronic ising machine that combines hafnium-oxide memristors with stochastic magnetic tunnel junctions (SMTJs). An ising machine is a computing device that solves complex combinatorial optimization problems. It operates by repeatedly updating binary variables until the system reaches a low-energy configuration that achieves a good compromise between problem constraints. Contrasting traditional implementations of local-search optimization, the research team’s architecture reduces data movement and digital-instruction overhead by pairing key operations with the physical properties of nanodevices.
The researchers address combinatorial optimization as a computational task involving finding the best choice among near-infinite possibilities. Efficiency gains in this area translate into saved time, energy, and resources across industries. Application include:
- Logistics and transport routing.
- Power-grid management.
- Industrial scheduling and chip design.
- Hardware acceleration for scheduling and resource-allocation tasks in computing systems.
Louis Hutin, co-principal investigator of the project and senior scientist at CEA-Leti, explains, “Optimization is a bit like guiding a marble toward a target pocket on a tilted maze board. The tilt drives the marble downhill but downhill can sometimes lead to a dead end. A small shake gives it enough energy to escape and explore another route. Our system provides that shake by the natural fluctuations of magnetic tunnel junctions, and its strength is controllable through their coupling with the memristor network.”
The researchers also report that hybrid nanotechnologies are formable into a working optimization accelerator, rather than as separate building blocks. As memristors, magnetic tunnel junctions, and CMOS circuitry are compatible with advanced integration, the work points toward compact, fast, and energy-efficient hardware for local-search optimization.
According to the team, a primary challenge in optimization hardware is controlling the necessary random fluctuations for exploring possible solutions. Early stages require high randomness to avoid getting stuck in local minima, while later stages require stability to converge on a solution.
The team demonstrated a system in which the two nanotechnologies work together naturally. Memristors store the links describing how variables influence each other while SMTJs act as probabilistic yes/no variables that fluctuate due to thermal noise. These two elements adjust the read voltage of the memristor array and progressively reduce randomness during the search, providing intrinsic annealing with minimal additional circuitry.
This close coupling provides a natural pathway for annealing without needing a separate, heavy control layer for every update step. While the current prototype utilizes external feedback for measurement, the underlying architecture points toward a fully integrated version that minimizes data movement and digital instruction overhead.
For greater enlightenment, peruse the Nature Communications article, “Intrinsic Annealing in a Hybrid Memristor-Magnetic Tunnel Junction Ising Machine.” For more information, visit the CEA-Leti website.
